This exploded diagram shows an additional 64MiB of L3 cache atop the center of the CCD, with structural silicon inserts to either side of the new layer. [credit: AMD ] Yesterday at Computex 2021, AMD CEO Lisa Su showed off the company’s next big performance play—3D stacked chiplets, allowing the company to triple the amount […]
This slide from IBM’s preview announcement gives more detail on the new process design. [credit: IBM ] Thursday, IBM announced a breakthrough in integrated circuit design—the world’s first 2 nanometer process. IBM says its new process can produce CPUs capable of either 45 percent higher performance, or 75 percent lower energy use than modern 7 […]